718c41634f
1.项目后端整体迁移至PaddleOCR-NCNN算法，已通过基本的兼容性测试 2.工程改为使用CMake组织，后续为了更好地兼容第三方库，不再提供QMake工程 3.重整权利声明文件，重整代码工程，确保最小化侵权风险 Log: 切换后端至PaddleOCR-NCNN，切换工程为CMake Change-Id: I4d5d2c5d37505a4a24b389b1a4c5d12f17bfa38c
58 lines
1.1 KiB
Markdown
58 lines
1.1 KiB
Markdown
```c
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// v寄存器全部使用 %.4s
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// 128-bit vreg matches %.4s
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// a += b * c
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float32x4_t _a = vld1q_f32(a);
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float32x4_t _b = vld1q_f32(b);
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float32x4_t _c = vld1q_f32(c);
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asm volatile(
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"fmla %0.4s, %2.4s, %3.4s"
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: "=w"(_a) // %0
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: "0"(_a),
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"w"(_b), // %2
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"w"(_c) // %3
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:
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);
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```
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```c
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// v寄存器使用低64位 %.2s
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// low 64-bit vreg matches %.2s
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// a += b * c
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float32x2_t _a = vld1_f32(a);
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float32x2_t _b = vld1_f32(b);
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float32x2_t _c = vld1_f32(c);
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asm volatile(
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"fmla %0.2s, %2.2s, %3.2s"
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: "=w"(_a) // %0
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: "0"(_a),
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"w"(_b), // %2
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"w"(_c) // %3
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:
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);
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```
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```c
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// v寄存器单路使用 %.s[0] %.s[1] %.s[2] %.s[3]
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// 32-bit register matches %.s[0]
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// a += b * c[0]
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// a += b * c[1]
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// a += b * c[2]
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// a += b * c[3]
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float32x4_t _a = vld1_f32(a);
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float32x4_t _b = vld1_f32(b);
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float32x4_t _c = vld1_f32(c);
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asm volatile(
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"fmla %0.4s, %2.4s, %3.s[0]"
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"fmla %0.4s, %2.4s, %3.s[1]"
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"fmla %0.4s, %2.4s, %3.s[2]"
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"fmla %0.4s, %2.4s, %3.s[3]"
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: "=w"(_a) // %0
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: "0"(_a),
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"w"(_b), // %2
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"w"(_c) // %3
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:
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);
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```
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qwq
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